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What (who) is Verilog - definition
HARDWARE DESCRIPTION LANGUAGE
Verilog HDL; .v; Verilog 95; Verilog 2001; Verilog-HDL; IEEE 1364
Verilog
<language> A Hardware Description Language for electronic
design and gate level simulation by {Cadence Design
Systems}.
xnf2ver is an XNF to Verilog translator.
["The Verilog Hardware Description Language", Donald E. Thomas
& Philip Moorby, Kluwer, 1991 ].
(1999-04-16)
Verilog Procedural Interface
SOFTWARE INTERFACE BETWEEN C AND VERILOG
The Verilog Procedural Interface (VPI), originally known as PLI 2.0, is an interface primarily intended for the C programming language.
List of HDL simulators
WIKIMEDIA LIST ARTICLE
List of Verilog Simulators; List of Verilog simulators; List of free and open-source HDL simulators; HDL simulator
HDL simulators are software packages that simulate expressions written in one of the hardware description languages, such as VHDL, Verilog, SystemVerilog.
Wikipedia
Verilog
Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is also used in the verification of analog circuits and mixed-signal circuits, as well as in the design of genetic circuits. In 2009, the Verilog standard (IEEE 1364-2005) was merged into the SystemVerilog standard, creating IEEE Standard 1800-2009. Since then, Verilog is officially part of the SystemVerilog language. The current version is IEEE standard 1800-2017.
